RiVer Core Verification Framework Manual¶
Welcome to the RiVer Core Verification Framework Manual.
Copyright (c) 2021, InCore Semiconductors Pvt. Ltd.;
Copyright (c) 2021, Tessolve Semiconductors Pvt. Ltd.;
Information in this document is provided “as is” with faults, if any.
Owners expressly disclaims all warranties, representations, and conditions of any kind, whether express or implied, including, but not limited to, the implied warranties or conditions of merchantability, fitness for a particular purpose and non-infringement.
Owners does not assume any liability rising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation indirect, incidental, special, exemplary, or consequential damages.
Owners reserves the right to make changes without further notice to any products herein.
- 1. Introduction
- 2. Framework Overview
- 3. Quickstart
- 4. Config.ini Spec
- 5. Test List Format
- 6. Generator Plugins
- 7. DUT Plugins
- 8. Reference Plugins
- 9. Merge Flow
- 10. Build Your Own Plugin
- 11. Code Documentation
- 12. CHANGELOG
- 13. Contributing
- 14. Contributors
- 15. Licensing and Support